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 SP4T+SP4T Antenna Switch for GSM/UMTS
Preliminary
PreliminaryCXG1224XR
Description
The CXG1224XR is a high power SP4T+SP4T antenna switch for GSM/UMTS applications. The low insertion loss on transmit means increased talk time as the Tx power amplifier can be operated at a lower output level. On chip logic reduces component count and simplifies PCB layout by allowing direct connection of the switch to digital baseband control lines with CMOS logic levels. It requires 3 CMOS control lines. The Sony GaAs JPHEMT MMIC process is used for low insertion loss. (Applications: GSM/UMTS dual-mode handsets)
Features
Insertion loss (Tx1) 0.35dB (Typ.) @34dBm (GSM900)
Package
Small and low height package size: 24-pin XQFN (2.7mm x 3.5mm x 0.4mm (Max.))
Structure
GaAs JPHEMT MMIC
Absolute Maximum Ratings
(Ta = 25C) Bias voltage Control voltage Input power max. (Tx1) Input power max. (Tx2) Input power max. (UMTS1, 2) Input power max. (all_Rx) Operating temperature Storage temperature VDD Vctl 7 5 36 34 32 13 -35 to +85 -65 to +150 V V dBm dBm dBm dBm
C C
(Duty cycle = 12.5 to 50%) (Duty cycle = 12.5 to 50%)
This IC is ESD sensitive device. Special handling precautions are required. The actual ESD test data will be availavle later. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
PE05Y46-PS
CXG1224XR
Block Diagram
Ant1 F3 F10
Rx1 (GSM850)
Tx1 (GSM850/900) UMTS1
F1
F4 F11
Rx2 (GSM900)
F7 F14
Ant2 F5 F12 F9 Tx2 (GSM1800/1900) F2 F14 UMTS2 F7 F6 F13
Rx3 (GSM1800)
Rx4 (GSM1900)
Pin Configuration
(Preliminary) (Top View)
GND GND GND 9 Tx1 Tx2 8 7 GND 6 UMTS1 5 GND 4 UMTS2 3 GND 2 Ant2 1 GND 20 GND 21 VDD 22 CTLA 23 CTLB 24 CTLC
12 Ant1 13 GND 14 GND 15 Rx1 16 Rx2 17 Rx3 18 Rx4 19
11
10
-2-
CXG1224XR
Truth Table
CTL A H H L L L L H H B H L L L H H L L C L L L H H L H H F1 F2 F3 F4 F5 F6 Switch F7 F9 F10 F11 F12 F13 F14 ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON
Mode Tx1 GSM850/900 Tx2 GSM1800/1900 Rx1 GSM850 Rx2 GSM900 Rx3 GSM1800 Rx4 GSM1900 UMTS1 UMTS2
ON OFF OFF OFF OFF OFF OFF ON
OFF ON OFF OFF OFF OFF OFF OFF ON
OFF OFF ON OFF OFF OFF OFF ON OFF ON OFF OFF OFF ON OFF OFF OFF ON OFF OFF OFF OFF ON OFF OFF ON OFF OFF OFF OFF OFF ON OFF ON OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF ON ON ON
ON OFF ON ON ON ON ON
ON OFF ON ON ON ON
ON OFF ON ON ON ON OFF ON OFF
DC Bias Condition
(Ta = 25C) Item Vctl (H) Vctl (L) VDD Min. 2.0 0 2.6 Typ. 2.8 -- 2.8 Max. 3.6 0.4 3.6 V Unit
-3-
CXG1224XR
Electrical Characteristics
(Ta = 25C) Item Symbol Port Ant1 - Tx1 Ant1 - Rx1 Ant1 - Rx2 Ant1 - UMTS1 Insertion loss IL Ant2 - Tx2 Ant2 - Rx3 Ant2 - Rx4 Ant2 - UMTS2 Ant1 - Rx1 Ant1 - Rx2 Ant1 - UMTS1 Ant1 - Tx1 Ant1 - Rx1 Ant1 - Rx2 Tx1 - Rx1 Tx1 - Rx2 UMTS1 - Rx1 Isolation ISO. UMTS1 - Rx2 Ant2 - Rx3 Ant2 - Rx4 Ant2 - UMTS2 Ant2 - Tx2 Ant2 - Rx3 Ant2 - Rx4 Tx2 - Rx3 Tx2 - Rx4 UMTS2 - Rx3 UMTS2 - Rx4 VSWR VSWR All ports in active paths
*10, *11 *3 *10, *11 *3 *8, *9 *2 *8, *9 *2 *2 *4, *5 *4, *5 *8 *9 *3 *6, *7 *6, *7 *10 *11
Condition
Min.
Typ. 0.35 0.50 0.50 0.38 0.38 0.47 0.70 0.65 0.43 0.52
Max. 0.50 0.65 0.65 0.53 0.53 0.62 0.85 0.80 0.58 0.67
Unit
dB
27 30 29 18 26 30 32 31 31 31 28 25 20 23 26 23 32 29 27 25
32 35 34 21 31 35 37 36 36 36 33 30 24 28 31 28 36 34 32 30 1.2 -- dB
824 to 2170MHz
-4-
CXG1224XR
Item
Symbol 2fo 3fo 2fo
Port Tx1 - Ant1
*2
Condition
Min.
Typ. -33 -30
Max. -30 -27 -44 -46 -31 -28 -40 -39 45 0.45 10 15
Unit
Harmonics *1
3fo 2fo 3fo 2fo 3fo
UMTS1 - Ant1
*8
-47 -49
Tx2 - Ant2
*3
-34 -32
dBm
UMTS2 - Ant2
*10
-43 -42
Control Current Supply Current Switching Speed
Ictl IDD Swt1 Swt2 Tx1, Tx2, Rx1, Rx2, Rx3, Rx4 UMTS1, UMTS2
Vctl = 2.8V VDD = 2.8V VDD = 2.8V, Vctl = 2.8V
25 0.30 5 10
A mA s
Note) Electrical Characteristics are measured with all RF ports terminated in 50.
*1
*2 *3 *4 *5 *6 *7 *8 *9 *10 *11
Harmonics measured with Tx inputs harmonically matched. It is recommend that the harmonic matching is used to ensure optimum performance. Power incident on Tx1, Pin = 34dBm, 824 to 915MHz, VDD = 2.8V, Tx1 enabled Power incident on Tx2, Pin = 32dBm, 1710 to 1910MHz, VDD = 2.8V, Tx2 enabled Power incident on Ant1, Pin = 10dBm, 869 to 894MHz, VDD = 2.8V, Rx1 or Rx2 enabled Power incident on Ant1, Pin = 10dBm, 925 to 960MHz, VDD = 2.8V, Rx1 or Rx2 enabled Power incident on Ant2, Pin = 10dBm, 1805 to 1880MHz, VDD = 2.8V, Rx3 or Rx4 enabled Power incident on Ant2, Pin = 10dBm, 1930 to 1990MHz, VDD = 2.8V, Rx3 or Rx4 enabled Power incident on UMTS1, Pin = 26dBm, 824 to 849MHz, VDD = 2.8V, UMTS1 enabled Power incident on Ant1, Pin = 10dBm, 869 to 894MHz, VDD = 2.8V, UMTS1 enabled Power incident on UMTS2, Pin = 26dBm, 1920 to 1980MHz, VDD = 2.8V, UMTS2 enabled Power incident on Ant2, Pin = 10dBm, 2110 to 2170MHz, VDD = 2.8V, UMTS2 enabled
-5-
CXG1224XR
Recommended Circuit
Tx1
Tx2
CRF (56pF)
CRF (33pF)
12 Ant1 CRF (56pF) 13 14 15 Rx1 Rx2 Rx3 Rx4 CRF (56pF) CRF (56pF) CRF (33pF) CRF (33pF) 16 17 18 19 20
11
10
9
8 7 6 5 4 3 2 1 CRF (33pF) CRF (33pF) Ant2 CRF (56pF) UMTS2 UMTS1
21
22
23
24
CTLC VDD Cbypass (100pF) Cbypass (100pF) Rctl (1k) CTLA Cbypass (100pF) Rctl (1k) Cbypass (100pF) Rctl (1k) CTLB
When using this IC, the following external components should be used: Rctl: This resistor is used to improve ESD performance.1k is recommended. CRF: This capacitor is used for RF decoupling and must be used for all applications. Cbypass: This capacitor is used for DC line filtering.100pF is recommended.
-6-
CXG1224XR
Package Outline
(Unit: mm)
24PIN XQFN (PLASTIC)
x4 0.05 0.4 0.1 0.35 0.05 3.5 C 19 20 13 12 2.7 A B S A-B C
24 1 PIN 1 INDEX 7
8
0.4 0.18 0.07 0.25 0.05 M S A-B C
0.14
0.
26
0.05
S
S
Solder Plating + 0.09 0.14 - 0.03 + 0.09 0.25 - 0.03
MAX0.02
5-18m
S
TERMINAL SECTION
Note:Cutting burr of lead are 0.05mm MAX.
SONY CODE EIAJ CODE JEDEC CODE XQFN-24P-01
PACKAGE STRUCTURE
PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.01g
LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt%
-7-
Sony Corporation


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